A conventional technique to form electrical connections between the individual channel layers of a nanosheet Field Effect Transistor (FET) and Source/Drain (S/D) contacts uses a selective epitaxial process to form epitaxial regions that are grown from the end surfaces of the channel layers (nanosheets). Such a conventional approach depends on the separation between the individual channel layers and can result in voids between the different epitaxial regions. Additionally, the conventionally formed electrical connections between the individual channels layers and the S/D contacts can result in a relatively high parasitic resistance RPARA and a relatively high parasitic capacitance CPARA, which reduces the overall performance of a nanosheet FET.